The present invention relates in general to digital clock recovery circuits and, in particular, to a digital clock recovery circuit for use with return-to-zero data streams.
Recovering clock pulses from a stream of return-to-zero data pulses is known in the prior art, but has typically been implemented with analog means such as ringing tanks and injection locked oscillators. These have required expensive factory adjustments to tune the circuits, and sensitivity to environmental changes such as temperature and humidity must be considered. Digital implementations in the prior art have not typically addressed return-to-zero data encoding, and have required a reference clock many times the basic data rate. In applications requiring data rates in the megabit per second range, it becomes impractical to provide a reference clock more than a few times the basic data rate.
The present invention overcomes these drawbacks in the prior art.